Computer Organization and Architecture Mcqs

Page No. 37

The Reason for the disregarding of the SRAM’s is ________


aLow Efficiency


bHigh power consumption


cHigh Cost


d All of the mentioned


View Answer High Cost

To improve the data retrieval rate ____________


aThe memory is divided into two banks


b The hardware is changed


cThe clock frequency is increased


dNone of the mentioned



DDR SDRAM’s perform faster data transfer by _______


aIntegrating the hardware


b Transferring on both edges


cImproving the clock speeds


d Increasing the bandwidth



The SDRAM performs operation on the _______


aRising edge of the clock


bFalling edge of the clock


cMiddle state of the clock


dTransition state of the clock



In SDRAM’s buffers are used to store data that is read or written.


aTrue


b False


ceither true either false


dnone of the mentioned


View Answer True

The time taken to transfer a word of data to or from the memory is called as ______


aAccess time


bCycle time


c Memory latency


dNone of the mentioned


View Answer Memory latency

In a SDRAM each row is refreshed every 64ms.


aTrue


bFalse


ceither true either false


dnone of the mentioned


View Answer True

The mode register is used to _______


aSelect the row or column data transfer mode


b Select the mode of operation


cSelect mode of storing the data


d All of the mentioned



A _______ is used to restore the contents of the cells.


aSense amplifier


bRefresh counter


cRestorer


d None of the mentioned


View Answer Refresh counter

The difference in the address and data connection between DRAM’s and SDRAM’s is _______


aThe usage of more number of pins in SDRAM’s


bThe requirement of more address lines in SDRAM’s


cThe usage of a buffer in SDRAM’s


d None of the mentioned



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