Computer Organization and Architecture Mcqs

Page No. 38

The difference between DRAM’s and SDRAM’s is/are ________


aThe DRAM’s will not use the master slave relationship in data transfer


b The SDRAM’s make use of clock


cThe SDRAM’s are more power efficient


dNone of the mentioned


View Answer None of the mentioned

When DRAM’s are used to build a complex large memory, then the controller only provides the refresh counter.


aTrue


bFalse


ceither true either false


dnone of the mentioned


View Answer True

Consider a memory organised into 8K rows, and that it takes 4 cycles to complete a read operation. Then the refresh overhead of the chip is ______


a0.0021


b 0.0038


c 0.0064


d0.0128


View Answer 0.0038

The RAS and CAS signals are provided by the ______


aMode register


bCS


cMemory controller


dNone of the mentioned


View Answer Memory controller

The controller multiplexes the addresses after getting the _____ signal.


aINTR


bACK


cRESET


dRequest


View Answer Request

The address lines multiplexing is done using ______


a MMU


bMemory controller unit


cPage table


dOverlay generator



The higher order bits of the address are used to _____


aSpecify the row address


b Specify the column address


cInput the CS


d None of the mentioned



The SRAM’s are basically used as ______


aRegisters


bCaches


cTLB


dBuffer


View Answer Caches

The less space consideration as lead to the development of ________ (for large memories).


aSIMM’s


bDIMS’s


cSRAM’s


dBoth SIMM’s and DIMS’s



To organise large memory chips we make use of ______


aIntegrated chips


bUpgraded hardware


c Memory modules


dNone of the mentioned


View Answer Memory modules

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