Computer Organization and Architecture Mcqs

Page No. 36

The duration between the read and the mfc signal is ______


aAccess time


bLatency


cDelay


d Cycle time


View Answer Access time

The block transfer capability of the DRAM is called ________


aBurst mode


bBlock mode


cFast page mode


dFast frame mode


View Answer Fast page mode

In order to read multiple bytes of a row at the same time, we make use of ______


aLatch


bShift register


cCache


dMemory extension


View Answer Latch

To get the row address of the required data ______ is enabled.


aCAS


bRAS


cCS


d Sense/write


View Answer RAS

The processor must take into account the delay in accessing the memory location, such memories are called ______


aDelay integrated


bAsynchronous memories


cSynchronous memories


dIsochronous memories


View Answer Asynchronous memories

To reduce the number of external connections required, we make use of ______


aDe-multiplexer


bMultiplexer


cEncoder


dDecoder


View Answer Multiplexer

_________ circuit is used to restore the capacitor value.


a Sense amplify


bSignal amplifier


cDelta modulator


dNone of the mentioned


View Answer Sense amplify

The capacitors lose the charge over time due to ________


aThe leakage resistance of the capacitor


bThe small current in the transistor after being turned on


cThe defect of the capacitor


dNone of the mentioned



The reason for the cells to lose their state over time is ________


aThe lower voltage levels


bUsage of capacitors to store the charge


c Use of Shift registers


dNone of the mentioned



The disadvantage of DRAM over SRAM is/are _______


aLower data storage capacities


bHigher heat dissipation


cThe cells are not static


dAll of the mentioned



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