Computer Organization and Architecture Mcqs

Page No. 5

The clock rate of the processor can be improved by _________


aImproving the IC technology of the logic circuits


bReducing the amount of processing done in one step


cBy using the overclocking method


dAll of the mentioned


View Answer All of the mentioned

For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution?


aISA


b ANSA


c Super-scalar


dAll of the mentioned


View Answer Super-scalar

A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______


aSuper-scaling


bPipe-lining


cParallel Computation


d None of the mentioned


View Answer Pipe-lining

During the execution of the instructions, a copy of the instructions is placed in the ______


aRegister


b RAM


c System heap


dCache


View Answer Cache

_____ addressing mode is most suitable to change the normal sequence of execution of instructions.


aRelative


b Indirect


cIndex with Offset


d Immediate


View Answer Relative

The effective address of the following instruction is MUL 5(R1,R2).


a 5+R1+R2


b5+(R1*R2)


c 5+[R1]+[R2]


d5*([R1]+[R2])


View Answer 5+[R1]+[R2]

The addressing mode, where you directly specify the operand value is _______


aImmediate


bDirect


cDefinite


d Relative


View Answer Immediate

When we use auto increment or auto decrements, which of the following is/are true?
1) In both, the address is used to retrieve the operand and then the address gets altered
2) In auto increment, the operand is retrieved first and then the address altered
3) Both of them can be used on general purpose registers as well as memory locations,


a1, 2, 3


b 2


c1, 3


d 2, 3


View Answer 2, 3

The addressing mode/s, which uses the PC instead of a general purpose register is ______


aIndexed with offset


bRelative


cDirect


dBoth Indexed with offset and direct


View Answer Relative

In the following indexed addressing mode instruction, MOV 5(R1), LOC the effective address is _____


aEA = 5+R1


bEA = R1


cEA = [R1]


d EA = 5+[R1]


View Answer EA = 5+[R1]

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