Computer Organization and Architecture Mcqs

Page No. 4

The main virtue for using single Bus structure is ____________


aFast data transfers

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bCost effective connectivity and speed

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c Cost effective connectivity and ease of attaching peripheral devices

✓


dNone of the mentioned

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As of 2000, the reference system to find the SPEC rating are built with _____ Processor.


aIntel Atom SParc 300Mhz

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b Ultra SPARC -IIi 300MHZ

✓


c Amd Neutrino series

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dASUS A series 450 Mhz

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If the instruction, Add R1, R2, R3 is executed in a system that is pipe-lined, then the value of S is (Where S is a term of the Basic performance equation)?


a3

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b~2

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c ~1

✓


d6

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View Answer ~1

If a processor clock is rated as 1250 million cycles per second, then its clock period is ________


a 1.9 * 10-10 sec

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b1.6 * 10-9 sec

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c1.25 * 10-10 sec

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d 8 * 10-10 sec

✓


View Answer 8 * 10-10 sec

The average number of steps taken to execute the set of instructions can be made to be less than one by following _______


a ISA

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bPipe-lining

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cSuper-scaling

✓


dSequential

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View Answer Super-scaling

When Performing a looping operation, the instruction gets stored in the ______


aRegisters

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bCache

✓


cSystem Heap

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d System stack

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View Answer Cache

As of 2000, the reference system to find the performance of a system is _____


aUltra SPARC 10

✓


bSUN SPARC

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cSUN II

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dNone of the mentioned

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View Answer Ultra SPARC 10

SPEC stands for _______


aStandard Performance Evaluation Code

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bSystem Processing Enhancing Code

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cSystem Performance Evaluation Corporation

✓


dStandard Processing Enhancement Corporation

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The ultimate goal of a compiler is to ________


aReduce the clock cycles for a programming task

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bReduce the size of the object code

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c Be versatile

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d Be able to detect even the smallest of errors

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An optimizing Compiler does _________


aBetter compilation of the given piece of code

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bTakes advantage of the type of processor and reduces its process time

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cDoes better memory management

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d None of the mentioned

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