Computer Organization and Architecture Mcqs

Page No. 47

The IDE bus is used to connect ___________


aRAM and processor

✖


bGPU and processor

✖


cBoth Harddisk and CD/DVD drives and Processor

✓


dOnly CD/DVD drives and Processor

✖



The bus used to connect the monitor to the CPU is ____________


aPCI bus

✓


bSCSI bus

✖


cMemory bus

✖


dRambus

✖


View Answer Rambus

To extend the connectivity of the processor bus we use ______


aPCI bus

✓


bSCSI bus

✖


cControllers

✖


d Multiple buses

✖


View Answer PCI bus

The main virtue for using a single Bus structure is ________


aFast data transfers

✖


bCost-effective connectivity and speed

✖


cCost-effective connectivity and ease of attaching peripheral devices

✓


dNone of the mentioned

✖



The small extremely fast RAM is called as ________


aCache

✓


b Heaps

✖


cAccumulators

✖


dStacks

✖


View Answer Cache

_________ signal enables the processor to wait for the memory operation to complete.


aMFC

✖


bTLB

✖


cWMFC

✓


dALB

✖


View Answer WMFC

The completion of the memory operation is indicated using ______ signal.


aMFC

✓


bWMFC

✖


cCFC

✖


dNone of the mentioned

✖


View Answer MFC

Is the below code segment correct, for the addition of two numbers?


aTrue

✓


bFalse

✖


ceither true either false

✖


dnone of the mentioned

✖


View Answer True

There exists a separate block to increment the PC in multiple BUS organisation.


aTrue

✓


bFalse

✖


ceither true either false

✖


dnone of the mentioned

✖


View Answer True

There exists a separate block consisting of various units to decode an instruction.


atrue

✓


b false

✖


ceither true either false

✖


dnone of the mentioned

✖


View Answer true

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