Computer Organization and Architecture Mcqs

Page No. 45

The memory blocks are mapped on to the cache with the help of ______


aHash functions

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bVectors

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cMapping functions

✓


dNone of the mentioned

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View Answer Mapping functions

he miss penalty can be reduced by improving the mechanisms for data transfer between the different levels of hierarchy.


aTrue

✓


bFalse

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ceither true either false

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dnone of the mentioned

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View Answer True

The extra time needed to bring the data into memory in case of a miss is called as __________


aDelay

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b Propagation time

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cMiss penalty

✓


dNone of the mentioned

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View Answer Miss penalty

If hit rates are well below 0.9, then they’re called as speedy computers.


aTrue

✓


bFalse

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ceither true either false

✖


dnone of the mentioned

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View Answer False

The number failed attempts to access memory, stated in the form of a fraction is called as _________


aHit rate

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bMiss rate

✓


c Failure rate

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dDelay rate

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View Answer Miss rate

The number successful accesses to memory stated as a fraction is called as _____


aHit rate

✓


bMiss rate

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cSuccess rate

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dAccess rate

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View Answer Hit rate

In memory interleaving, the lower order bits of the address is used to _____________


aGet the data

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bGet the address of the module

✓


cGet the address of the data within the module

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dNone of the mentioned

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When consecutive memory locations are accessed only one module is accessed at a time.


aTrue

✓


bFalse

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ceither true either false

✖


dnone of the mentioned

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View Answer True

The main memory is structured into modules each with its own address register called _____


aABR

✓


b TLB

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cPC

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d IR

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View Answer ABR

________ signal is used to show complete of memory operation.


aMFC

✓


bWMFC

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cCFC

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d None of the mentioned

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View Answer MFC

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