Computer Organization and Architecture Mcqs

Page No. 46

When two or more clock cycles are used to complete data transfer it is called as ________


aSingle phase clocking

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bMulti-phase clocking

✓


cEdge triggered clocking

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d None of the mentioned

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View Answer Multi-phase clocking

The input and output of the registers are governed by __________


a Transistors

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bDiodes

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cGates

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dSwitches

✓


View Answer Switches

The registers, ALU and the interconnecting path together are called as ______


aControl path

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bFlow path

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cData path

✓


dNone of the mentioned

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View Answer Data path

Which register is connected to the MUX?


aY

✓


b Z

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c R0

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dTemp

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View Answer Y

The transparent register/s is/are __________


aY

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b Z

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cTemp

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dAll of the mentioned

✓


View Answer All of the mentioned

Which register in the processor is single directional?


aMAR

✓


bMDR

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cPC

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dTemp

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View Answer MAR

The PC gets incremented _____________


a After the instruction decoding

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bAfter the IR instruction gets executed

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cAfter the fetch cycle

✓


dNone of the mentioned

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View Answer After the fetch cycle

A common strategy for performance is making various functional units operate parallelly.


aTrue

✓


bFalse

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ceither true either false

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dnone of the mentioned

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View Answer True

The CPU is also called as ________


a Processor hub

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bISP

✓


cController

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d All of the mentioned

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View Answer ISP

IBM developed a bus standard for their line of computers ‘PC-AT’ called ________


aIB bus

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bM-bus

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cISA

✓


dNone of the mentioned

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View Answer ISA

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