Computer Organization and Architecture Mcqs

Page No. 17

The added output of the bits of the interrupt register and the mask register is set as an input of ______________


a Priority decoder

✖


bPriority encoder

✓


cProcess id encoder

✖


dMultiplexer

✖


View Answer Priority encoder

_____________ register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt.


aMass

✖


bMark

✖


cMake

✖


dMask

✓


View Answer Mask

______ interrupt method uses register whose bits are set separately by interrupt signal for each device.


aParallel priority interrupt

✓


bSerial priority interrupt

✖


cDaisy chaining

✖


d None of the mentioned

✖



In daisy chaining device 0 will pass the signal only if it has _______


aInterrupt request

✖


bNo interrupt request

✓


cBoth No interrupt and Interrupt request

✖


dNone of the mentioned

✖


View Answer No interrupt request

_________ method is used to establish priority by serially connecting all devices that request an interrupt.


aVectored-interrupting

✖


bDaisy chain

✓


c Priority

✖


dPolling

✖


View Answer Daisy chain

Which table handle stores the addresses of the interrupt handling sub-routines?


aInterrupt-vector table

✓


bVector table

✖


cSymbol link table

✖


dNone of the mentioned

✖



Which one of the following is true with regard to a CPU having a single interrupt request line and single interrupt grant line?
i) Neither vectored nor multiple interrupting devices is possible.
ii) Vectored interrupts is not possible but multiple interrupting devices is possible.
iii) Vectored interrupts is possible and multiple interrupting devices is not possible.
iv) Both vectored and multiple interrupting devices are possible.


aiii

✓


bi, iv

✖


cii, iii

✖


d iii, iv

✖


View Answer iii

We describe a protocol of input device communication below:
i) Each device has a distinct address.
ii) The BUS controller scans each device in a sequence of increasing address value to determine if the entity wishes to communicate
iii) The device ready to communicate leaves its data in the I/O register
iv) The data is picked up and the controller moves to the step a Identify the form of communication best describes the I/O mode amongst the following.


aProgrammed mode of data transfer

✖


bDMA

✖


cInterrupt mode

✖


dPolling

✓


View Answer Polling

The processor indicates to the devices that it is ready to receive interrupts ________


aBy enabling the interrupt request line

✖


bBy enabling the IRQ bits

✖


cBy activating the interrupt acknowledge line

✓


dNone of the mentioned

✖



The starting address sent by the device in vectored interrupt is called as __________


aLocation id

✖


bInterrupt vector

✓


cService location

✖


dService id

✖


View Answer Interrupt vector

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