Electrical Engineering MCQs

Page No. 26

Class _____________ operation gives the maximum distortion?


aA

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b B

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cC

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dAB

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View Answer C

The inputs of a NAND gate are connected together. The resulting circuit is _______________?


aOR gate

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bAND gate

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cNOT gate

✓


dNone of the above

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View Answer NOT gate

The universal gate is ________________?


aNAND gate

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bOR gate

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cAND gate

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dNone of the above

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View Answer NAND gate

What would happen, if smaller logic modules are utilized for performing logical functions associated with FPGA? A. Propagation delay will increase B. FPGA area will increase C. Wastage of logic modules will not be prevented D. Number of interconnected paths in device will decrease ?


aA & B

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bC & D

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cA & D

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d B & C

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View Answer A & B

Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins ?


a PLCC

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bQFP

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cPGA

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d BGA

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View Answer BGA

In Boolean algebra, the bar sign (-) indicates__________________?


aOR operation

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bAND operation

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cNOT operation

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dNone of the above

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View Answer NOT operation

What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view ?


aInput operation

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bTristate output operation

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cBi-directional I/O pin access

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dAll of the above

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View Answer All of the above

Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits ?


aState Reduction

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bState Minimization

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c State Assignment

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dState Evaluation

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View Answer State Assignment

Digital circuit can be made by the repeated use of________________?


aOR gates

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bNOT gates

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c NAND gates

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dNone of the above

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View Answer NAND gates

When an input signal 1 is applied to a NOT gate, the output is ______________?


a0

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b1

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cEither 0 & 1

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dNone of the above

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View Answer 0

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