Electrical Engineering MCQs

Page No. 26

Class _____________ operation gives the maximum distortion?


aA


b B


cC


dAB


View Answer C

The inputs of a NAND gate are connected together. The resulting circuit is _______________?


aOR gate


bAND gate


cNOT gate


dNone of the above


View Answer NOT gate

The universal gate is ________________?


aNAND gate


bOR gate


cAND gate


dNone of the above


View Answer NAND gate

What would happen, if smaller logic modules are utilized for performing logical functions associated with FPGA? A. Propagation delay will increase B. FPGA area will increase C. Wastage of logic modules will not be prevented D. Number of interconnected paths in device will decrease ?


aA & B


bC & D


cA & D


d B & C


View Answer A & B

Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins ?


a PLCC


bQFP


cPGA


d BGA


View Answer BGA

In Boolean algebra, the bar sign (-) indicates__________________?


aOR operation


bAND operation


cNOT operation


dNone of the above


View Answer NOT operation

What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view ?


aInput operation


bTristate output operation


cBi-directional I/O pin access


dAll of the above


View Answer All of the above

Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits ?


aState Reduction


bState Minimization


c State Assignment


dState Evaluation


View Answer State Assignment

Digital circuit can be made by the repeated use of________________?


aOR gates


bNOT gates


c NAND gates


dNone of the above


View Answer NAND gates

When an input signal 1 is applied to a NOT gate, the output is ______________?


a0


b1


cEither 0 & 1


dNone of the above


View Answer 0

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