Computer Organization and Architecture Mcqs

Page No. 68

As the instructions can deal with variable size operands we use ____________ to resolve this.


a Delimiter

✖


b Size indicator mnemonic

✓


c Special assemblers

✖


dNone of the mentioned

✖



The instructions in 68000 can deal with operands of three different sizes.


aTrue

✓


b False

✖


ceither true either

✖


d false none of the mentioned

✖


View Answer True

The effective address of the instruction written in Post-indexed mode, MOVE[Rn]+Rm is _______


aEA = [Rn]

✓


b EA = [Rn + Rm]

✖


c EA = [Rn] + Rm

✖


d EA = [Rm] + Rn

✖


View Answer EA = [Rn]

The addressing mode where the EA of the operand is the contents of Rn is ______


a Pre-indexed mode

✖


bPre-indexed with write back mode

✖


c Post-indexed mode

✓


d None of the mentioned

✖


View Answer Post-indexed mode

All instructions in ARM are conditionally executed.


aTrue

✖


bFalse

✖


ceither true either

✖


dfalse none of the mentioned

✖


View Answer True

Each instruction in ARM machines is encoded into __________ Word.


a 2 byte

✖


b3 byte

✖


c4 byte

✓


d8 byte

✖


View Answer 4 byte

The banked registers are used for ______


a Switching between supervisor and interrupt mode

✓


bExtended storing

✖


cSame as other general purpose registers

✖


dNone of the mentioned

✖



The additional duplicate register used in ARM machines are called as _______


a Copied-registers

✖


bBanked registers

✓


c EXtra registers

✖


dExtential registers

✖


View Answer Banked registers

In the ARM, PC is implemented using ___________


aCaches

✖


b Heaps

✖


cGeneral purpose register

✓


dStack

✖



RISC stands for _________


aRestricted Instruction Sequencing Computer

✖


bRestricted Instruction Sequential Compiler

✖


cReduced Instruction Set Computer

✓


dReduced Induction Set Computer

✖



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