Computer Organization and Architecture Mcqs

Page No. 26

What is the full form of ISA?


aInternational American Standard

✖


bIndustry Standard Architecture

✓


cInternational Standard Architecture

✖


dNone of the mentioned

✖



________ is an extension of the processor BUS.


a SCSI BUS

✖


bUSB

✖


cPCI BUS

✓


dNone of the mentioned

✖


View Answer PCI BUS

______ is used as an intermediate to extend the processor BUS.


aBridge

✓


b Router

✖


cConnector

✖


dGateway

✖


View Answer Bridge

In a general 8-bit parallel interface, the INTR line is connected to _______


atatus and Control unit

✓


bDDR

✖


cRegister select

✖


dNone of the mentioned

✖



DDR stands for __________


aData Direction Register

✓


bData Decoding Register

✖


cData Decoding Rate

✖


dNone of the mentioned

✖



In the output interface of the parallel port, along with the valid signal ______ is also sent.


aData

✖


bIdle signal

✓


c Interrupt

✖


dAcknowledge signal

✖


View Answer Idle signal

The Status flag circuit is implemented using _____


aRS flip flop

✖


bD flip flop

✓


c JK flip flop

✖


dXor circuit

✖


View Answer D flip flop

In a 32 bit processor, the A0 bit of the address line is connected to _____ of the parallel port interface.


aValid bit

✖


bIdle bit

✖


c Interrupt enable bit

✖


dStatus or data register

✓



The disadvantage of using a parallel mode of communication is ______


aIt is costly

✓


bLeads to erroneous data transfer

✖


cSecurity of data

✖


dAll of the mentioned

✖


View Answer It is costly

The output of the encoder circuit is/are ______


a ASCII code

✖


bSCII code and the valid signal

✓


cEncoded signal

✖


dNone of the mentioned

✖



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