Computer Organization and Architecture Mcqs

Page No. 22

The circuit used for the request line is a _________


aOpen-collector


bEX-OR circuit


cOpen-drain


dNand circuit


View Answer Open-drain

______ BUS arbitration approach uses the involvement of the processor.


aCentralised arbitration


bDistributed arbitration


cRandom arbitration


dAll of the mentioned



The device which is allowed to initiate data transfers on the BUS at any time is called _____


aBUS master


bProcessor


cBUS arbitrator


dController


View Answer BUS master

To resolve the clash over the access of the system BUS we use ______


aMultiple BUS


bBUS arbitrator


cPriority access


dNone of the mentioned


View Answer BUS arbitrator

_____________ signal is used as an acknowledgement signal by the slave in Multiple cycle transfers.


aAck signal


bSlave ready signal


cMaster ready signal


dSlave received signal


View Answer Slave ready signal

Which is fed into the BUS first by the initiator?


aData


bAddress


commands or controls


dAddress, Commands or controls



The Master strobes the slave at the end of each clock cycle in Synchronous BUS.


aTrue


bFalse


ceither true either false


d none of the mentioned


View Answer True

The time for which the data is to be on the BUS is affected by __________


aPropagation delay of the circuit


bSetup time of the device


cMemory access time


dPropagation delay of the circuit & Setup time of the device



The delays caused in the switching of the timing signals is due to __________


aMemory access time


bWMFC


cPropagation delay


dProcessor delay


View Answer Propagation delay

In synchronous BUS, the devices get the timing signals from __________


aTiming generator in the device


bA common clock line


ciming signals are not used at all


done of the mentioned


View Answer A common clock line

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