Computer Organization and Architecture Mcqs

Page No. 10

When using Branching, the usual sequencing of the PC is altered. A new instruction is loaded which is called as ______


aBranch target


bLoop target


cForward target


dJump instruction


View Answer Branch target

While using the iterative construct (Branching) in execution _____________ instruction is used to check the condition.


aTestAndSet


bBranch


cTestCondn


d None of the mentioned


View Answer Branch

The Instruction fetch phase ends with _________


aPlacing the data from the address in MAR into MDR


bPlacing the address of the data into MAR


cCompleting the execution of the data and placing its storage address into MAR


dDecoding the data in MDR and placing it in IR



The two phases of executing an instruction are __________


aInstruction decoding and storage


bInstruction fetch and instruction execution


cInstruction execution and storage


dInstruction fetch and Instruction processing



In a system, which has 32 registers the register id is __________ long.


a16 bit


b8 bits


c5 bits


d6 bits


View Answer 5 bits

The instruction, Add R1,R2,R3 in RTN is _______


aR3=R1+R2+R3


bR3<-[R1]+[R2]+[R3]


cR3=[R1]+[R2]


dR3<-[R1]+[R2]


View Answer R3<-[R1]+[R2]

Can you perform an addition on three operands simultaneously in ALN using Add instruction?


aYes


bNot possible using Add, we’ve to use AddSetCC


cNot permitted


dNone of the mentioned


View Answer Not permitted

The instruction, Add Loc,R1 in RTN is _______


aAddSetCC Loc+R1


bR1=Loc+R1


cNot possible to write in RTN


dR1<-[Loc]+[R1]


View Answer R1<-[Loc]+[R1]

RTN stands for ___________


aRegister Transfer Notation


bRegister Transmission Notation


cRegular Transmission Notation


dRegular Transfer Notation



To overcome the problems of the assembler in dealing with branching code we use _____


aInterpreter


bDebugger


cOp-Assembler


dTwo-pass assembler


View Answer Two-pass assembler

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